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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-06 11:59:46 +02:00
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e44aeda246d72fd0e2a7cbcd5fd73aa8a80dec80
yosys/techlibs/quicklogic
T
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nella f5809a7c2c Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
..
common
synth_quicklogic: rearrange files to prepare for adding more architectures
2023-12-04 15:52:02 +01:00
pp3
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
qlf_k6n10f
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
CMakeLists.txt
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
ql_bram_merge.cc
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
ql_bram_types.cc
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
ql_dsp_io_regs.cc
Refactored uses of log_id()
2026-05-08 20:59:24 -07:00
ql_dsp_macc.cc
Fixing couple more conversion errors
2026-05-14 15:58:58 +02:00
ql_dsp_macc.pmg
ql_dsp_macc: Tune DSP inference code
2023-12-04 15:52:02 +01:00
ql_dsp_simd.cc
Refactored uses of log_id()
2026-05-08 20:59:24 -07:00
ql_ioff.cc
Remove .c_str() from parameters to log_debug()
2025-09-23 19:10:33 +12:00
synth_quicklogic.cc
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
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