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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-30 18:01:44 +02:00
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e0f693cbb09ac1a952fc49e507daefa30169bd35
yosys/techlibs/common
T
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Clifford Wolf e0f693cbb0 Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_
2013-10-18 12:13:34 +02:00
..
blackbox.sed
Moved common techlib files to techlibs/common
2013-09-15 11:52:57 +02:00
Makefile.inc
Moved common techlib files to techlibs/common
2013-09-15 11:52:57 +02:00
simlib.v
Added $sr, $dffsr and $dlatch cell types
2013-10-18 11:56:16 +02:00
stdcells_sim.v
Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_
2013-10-18 12:13:34 +02:00
stdcells.v
Moved common techlib files to techlibs/common
2013-09-15 11:52:57 +02:00
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