mirror of https://github.com/YosysHQ/yosys.git
102 lines
2.9 KiB
Plaintext
102 lines
2.9 KiB
Plaintext
pattern addsub_c
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//
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// Authored by Akash Levy of Silimate, Inc. under ISC license.
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// Transforms add->add/sub_c into add_c folding the constants:
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// y = (a +- b_const) +- c_const ===> a +- eval(b_const +- c_const)
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//
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state <SigSpec> a b_const addsub1_y
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match addsub1
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// Select add/sub
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select addsub1->type.in($add, $sub)
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endmatch
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code a b_const addsub1_y
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// Get adder signals
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a = port(addsub1, \A);
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b_const = port(addsub1, \B);
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addsub1_y = port(addsub1, \Y);
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// A and B can be interchanged for adder
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if (addsub1->type == $add) {
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branch;
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std::swap(a, b_const);
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}
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endcode
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match addsub2
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// Select add/sub of form (a +- b_const) +- c_const
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select addsub2->type.in($add, $sub)
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// Check that b_const and c_const is constant
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filter b_const.is_fully_const()
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filter port(addsub2, \B).is_fully_const()
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index <SigSpec> port(addsub2, \A) === addsub1_y
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endmatch
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code
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// New addsub1 cell (will be reused unless there is external fanout)
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auto cell = addsub1;
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// Get addsub2 signals
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SigSpec c_const = port(addsub2, \B);
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SigSpec addsub2_y = port(addsub2, \Y);
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// Get properties and values of b_const and c_const
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// b_const may be coming from the A port
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// But it is an RTLIL invariant that A_SIGNED equals B_SIGNED
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bool b_const_signed = addsub1->getParam(ID::B_SIGNED).as_bool();
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bool c_const_signed = addsub2->getParam(ID::B_SIGNED).as_bool();
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int b_const_int = b_const.as_int(b_const_signed);
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int c_const_int = c_const.as_int(c_const_signed);
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// Calculate the constant and compress the width to fit the value
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Const const_value;
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if (addsub1->type == $add)
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if (addsub2->type == $add)
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const_value = b_const_int + c_const_int;
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else
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const_value = b_const_int - c_const_int;
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else
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if (addsub2->type == $add)
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const_value = b_const_int - c_const_int;
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else
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const_value = b_const_int + c_const_int;
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const_value.compress(b_const_signed | c_const_signed);
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// Integer values should be lesser than 32 bits
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// This is because we are using C++ types, and int is 32 bits
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// FIXME: use long long or BigInteger to make pass work with >32 bits
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if (addsub1->getParam(ID::A_WIDTH).as_int() > 32)
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reject;
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if (addsub1->getParam(ID::B_WIDTH).as_int() > 32)
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reject;
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if (addsub2->getParam(ID::A_WIDTH).as_int() > 32)
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reject;
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if (addsub2->getParam(ID::B_WIDTH).as_int() > 32)
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reject;
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if (GetSize(b_const) > 32)
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reject;
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if (GetSize(c_const) > 32)
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reject;
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// Reuse/create new cell to drive the folded expression
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if (nusers(addsub1_y) != 2) {
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cell = module->addCell(NEW_ID2_SUFFIX("asconst"), addsub1->type);
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cell->attributes = addsub1->attributes;
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cell->parameters = addsub1->parameters;
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}
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cell->setPort(\A, a);
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cell->setPort(\B, const_value);
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cell->setPort(\Y, addsub2_y);
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// Remove addsub2
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autoremove(addsub2);
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// Log, fixup, accept
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log("addsub_const pattern in %s: addsub1=%s, addsub2=%s\n", log_id(module), log_id(addsub1), log_id(addsub2));
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cell->fixup_parameters();
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accept;
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endcode
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