Clifford Wolf c23bbc4291 Add timescale and generated-by header to yosys-smtbmc MkVcd ... Signed-off-by: Clifford Wolf <clifford@clifford.at>		2019-06-16 23:12:03 +02:00
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aiger	…
blif	Fix handling of offset and upto module ports in write_blif, fixes #1040	2019-05-25 17:45:14 +02:00
btor	Add proper error message for btor recursion_guard	2019-05-24 16:22:34 +02:00
edif	…
firrtl	Fix static shift operands, neg result type, minor formatting	2019-05-21 13:04:56 -07:00
ilang	Add "real" keyword to ilang format	2019-05-06 12:00:40 +02:00
intersynth	…
json	…
protobuf	…
simplec	…
smt2	Add timescale and generated-by header to yosys-smtbmc MkVcd	2019-06-16 23:12:03 +02:00
smv	…
spice	…
table	…
verilog	Fix handling of partial init attributes in write_verilog, fixes #997	2019-05-07 19:55:36 +02:00