yosys/tests/verific
Akash Levy 16215b8786 Merge upstream 2025-09-29 20:58:56 -07:00
..
README.md Remove chformal test from verific since it requires initial value preservation 2025-07-21 18:07:49 -07:00
blackbox.ys.DISABLED Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
blackbox_empty.ys.DISABLED Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
blackbox_ql.ys.DISABLED Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
bounds.sv bound attributes: handle vhdl null ranges 2024-12-12 11:42:39 +01:00
bounds.vhd bound attributes: handle vhdl null ranges 2024-12-12 11:42:39 +01:00
bounds.ys.DISABLED Merge remote-tracking branch 'upstream/main' 2024-12-12 22:49:19 -08:00
case.sv Add test example 2023-02-27 09:24:04 +01:00
case.ys Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
chformal.ys.DISABLED Remove chformal test from verific since it requires initial value preservation 2025-07-21 18:07:49 -07:00
clocking.ys Revert clocking.ys 2025-02-13 20:32:17 -08:00
enum_values.sv verific: Fix enum_values support and signed attribute values 2023-03-15 09:51:36 +01:00
enum_values.ys verific: Fix enum_values support and signed attribute values 2023-03-15 09:51:36 +01:00
memory_semantics.ys.DISABLED Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
range_case.sv Added ranged case check 2023-02-27 09:24:04 +01:00
range_case.ys Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
rom_case.ys.DISABLED Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
run-test.sh Use a better method of fixing up Verific run-test.mk 2025-07-21 17:08:38 -07:00
setenv.flist add setenv pass 2024-12-06 11:25:43 +01:00
setenv.ys Revert back to using Verific naming 2025-02-13 19:40:33 -08:00
sva_continue_on_err.ys verific: New `-sva-continue-on-error` import option 2025-09-24 18:58:54 +02:00
sva_continue_on_err_explosion.ys verific: Extend -sva-continue-on-err to handle FSM explosion 2025-09-27 21:13:02 +02:00
sva_no_continue_on_err.ys verific: New `-sva-continue-on-error` import option 2025-09-24 18:58:54 +02:00

README.md

Verific Test Cases

Disabled

  • bounds: relies on using Verific's VHDL frontend
  • memory_semantics: relies on initial values being retained, which we do not want
  • rom_case: relies on using Verific's VHDL frontend
  • blackbox*: we need different behavior for parametrized blackboxes
  • chformal: relies on initial values being retained, which we do not want