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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-04 19:31:00 +02:00
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db09e96dff63b7b0fdb7010ad1965aaf261cbe2f
yosys/frontends
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Marcelina Kościelnicka 06a344efcb ilang, ast: Store parameter order and default value information.
Fixes #1819, #1820.
2020-04-21 19:09:00 +02:00
..
aiger
aigerparse: only define __STDC_FORMAT_MACROS it not already before.
2020-04-07 12:50:31 -07:00
ast
ilang, ast: Store parameter order and default value information.
2020-04-21 19:09:00 +02:00
blif
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
ilang
ilang, ast: Store parameter order and default value information.
2020-04-21 19:09:00 +02:00
json
Update JSON front-end to process new attr/param encoding
2019-08-01 12:48:22 +02:00
liberty
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
rpc
ast, rpc: record original name of $paramod\* as \hdlname attribute.
2020-04-18 03:47:28 +00:00
verific
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
verilog
Set Verilog source location for explicit blocks (begin ... end).
2020-04-17 06:23:03 +00:00
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