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luke
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yosys
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d9cecabb877b1d58efc1bfcd962201eace67640d
yosys
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techlibs
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History
Clifford Wolf
d9cecabb87
Fixed copy&paste typo in synth_greenpak4
2015-09-16 09:39:31 +02:00
..
cmos
Improved liberty file test case
2015-07-06 17:45:56 +02:00
common
Added $tribuf and $_TBUF_ sim models
2015-08-16 13:05:32 +02:00
greenpak4
Fixed copy&paste typo in synth_greenpak4
2015-09-16 09:39:31 +02:00
ice40
Fixed ice40 handling of negclk RAM40
2015-09-10 17:35:19 +02:00
xilinx
Switched to Python 3
2015-08-22 09:59:33 +02:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00