Eddie Hung 02973474df Remove extra newline		2019-06-03 20:04:47 -07:00
..
tests	…
.gitignore	…
Makefile.inc	…
arith_map.v	…
brams.txt	…
brams_bb.v	…
brams_init.py	…
brams_map.v	…
cells_map.v	Rename cells_map.v to prevent clash with ff_map.v	2019-05-03 14:40:32 -07:00
cells_sim.v	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
cells_xtra.sh	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
cells_xtra.v	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
drams.txt	Add "min bits" and "min wports" to xilinx dram rules	2019-05-23 11:32:28 -07:00
drams_map.v	…
ff_map.v	Move neg-pol to pos-pol mapping from ff_map to cells_map.v	2019-04-28 12:36:04 -07:00
lut_map.v	…
synth_xilinx.cc	Remove extra newline	2019-06-03 20:04:47 -07:00