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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-31 18:24:48 +02:00
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d7f29bb23f9bb2c74e02bc1221bcf27efc7ee4dc
yosys/kernel
T
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Clifford Wolf a1bfde8c5e Strictly zero-extend unsigned A-inputs of shift operations
2014-03-06 11:53:37 +01:00
..
bitpattern.h
initial import
2013-01-05 11:13:26 +01:00
calc.cc
Strictly zero-extend unsigned A-inputs of shift operations
2014-03-06 11:53:37 +01:00
celltypes.h
Fixed const folding of $bu0 cells
2014-02-27 04:09:32 +01:00
consteval.h
Fixed SAT and ConstEval undef handling for $pmux and $safe_pmux
2014-01-03 17:30:50 +01:00
driver.cc
Added echo command
2014-02-07 14:17:00 +01:00
log.cc
Added -v<level> option and some minor driver cleanups
2013-11-17 13:26:31 +01:00
log.h
Some improvements in log_dump_val_worker() templates
2014-01-17 23:14:17 +01:00
register.cc
Fixed small memory leak in Pass::call()
2014-02-23 01:28:29 +01:00
register.h
Added "design -push" and "design -pop"
2014-02-20 23:28:59 +01:00
rtlil.cc
Improved checking of internal cell conventions
2014-02-08 19:13:49 +01:00
rtlil.h
Added generic RTLIL::SigSpec::parse_sel() with support for selection variables
2014-02-06 19:22:46 +01:00
satgen.h
Strictly zero-extend unsigned A-inputs of shift operations
2014-03-06 11:53:37 +01:00
sigtools.h
Some fixes to improve determinism
2013-08-09 12:42:32 +02:00
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