Ethan Sifferman d5beb65d30 added SIMLIB_VERILATOR_COMPAT

2025-10-01 10:19:25 -07:00

..

choices

Merge pull request #4789 from YosysHQ/emil/sklansky-adder

2024-12-03 11:33:13 +01:00

.gitignore

…

abc9_map.v

…

abc9_model.v

…

abc9_unmap.v

…

adff2dff.v

…

cellhelp.py

cellhelp.py: Cells can have tags

2024-10-15 07:35:41 +13:00

cells.lib

…

cmp2lcu.v

…

cmp2lut.v

…

cmp2softlogic.v

techlibs: Add cmp2softlogic.v to common

2023-11-13 10:42:12 +01:00

dff2ff.v

…

gate2lut.v

…

gen_fine_ffs.py

simcells: Apply group tags

2024-10-15 07:35:40 +13:00

Makefile.inc

techmap: add a Sklansky option for $lcu mapping

2024-12-02 11:34:58 +01:00

mul2dsp.v

…

pmux2mux.v

…

prep.cc

Remove .c_str() from stringf parameters

2025-09-01 23:34:42 +00:00

simcells.v

Docs: Assert cell has group

2024-10-15 07:35:40 +13:00

simlib.v

added SIMLIB_VERILATOR_COMPAT

2025-10-01 10:19:25 -07:00

smtmap.v

…

synth.cc

read_verilog: add -relativeshare for synthesis reproducibility testing

2025-09-16 15:47:35 +02:00

techmap.v

techmap: map $alu to $fa instead of relying on extract_fa

2025-09-23 17:05:12 +02:00