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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-30 09:58:22 +02:00
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yosys/tests/arch
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William D. Jones ae07298a6b machxo2: Switch to LUT4 sim model which propagates less undefined/don't care values.
2021-02-23 17:39:58 +01:00
..
anlogic
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
common
intel_alm: Add multiply signedness to cells
2020-08-26 22:50:16 +02:00
ecp5
memory_dff: Fix needlessly duplicating enable bits.
2020-10-22 13:03:42 +02:00
efinix
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
gowin
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
ice40
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
intel_alm
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
machxo2
machxo2: Switch to LUT4 sim model which propagates less undefined/don't care values.
2021-02-23 17:39:58 +01:00
nexus
nexus: DSP inference support
2020-11-20 08:45:55 +00:00
xilinx
xilinx_dffopt: Don't crash on missing IS_*_INVERTED.
2021-01-27 00:32:00 +01:00
run-test.sh
tests: extend tests/arch/run-tests.sh for defines
2020-03-05 08:08:32 -08:00
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