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luke
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yosys
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cfd80cb48e114d730b8237e18150b4b018929c01
yosys
/
techlibs
/
common
T
History
nella
f5809a7c2c
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
..
choices
…
abc9_map.v
…
abc9_model.v
…
abc9_unmap.v
…
adff2dff.v
…
CMakeLists.txt
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
cmp2lcu.v
…
cmp2lut.v
…
cmp2softlogic.v
…
dff2ff.v
…
gate2lut.v
…
gen_fine_ffs.py
…
mul2dsp.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
opensta.cc
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
opensta.h
…
pmux2mux.v
…
prep.cc
…
sdc_expand.cc
…
simcells.v
…
simlib.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
smtmap.v
…
synth.cc
Add latch inference msg severity option.
2026-06-15 14:17:02 +02:00
techmap.v
simplemap: Moves $pmux mapping from techmap.v to simple map
2026-04-29 21:20:39 +00:00