Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-08 04:41:06 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
cdf549a49372f9a65be2df360e86cbccf9f95db3
yosys/tests/arch/quicklogic
T
History
Emil J. Tywoniak ae281720cf tests: remove unstable FPGA synthesis result checks
2025-11-12 11:52:04 +01:00
..
pp3
tests: remove unstable FPGA synthesis result checks
2025-11-12 11:52:04 +01:00
qlf_k6n10f
create duplicate IOFFs if multiple output ports are connected to the same register
2025-01-31 11:28:57 +01:00
.gitignore
Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files.
2025-07-22 10:38:38 +00:00
Powered by Gitea Version: 1.27.2 Page: 62ms Template: 2ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API