Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-01 10:39:10 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
c7cf9415f8ad2cde0eae5020ea498d82ad72f00a
yosys/techlibs
T
History
Konrad Beckmann 5b9a975eba synth_gowin: Add rPLL blackbox
2020-11-11 17:06:54 +01:00
..
achronix
achronix: Use dfflegalize.
2020-07-14 23:12:16 +02:00
anlogic
anlogic: Fix FF mapping.
2020-07-17 14:03:21 +02:00
common
Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixes
2020-08-20 16:25:56 +02:00
coolrunner2
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
easic
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
ecp5
Replace opt_rmdff with opt_dff.
2020-08-07 13:21:03 +02:00
efinix
techmap: Add support for [] wildcards in techmap_celltype.
2020-08-02 22:46:48 +02:00
gowin
synth_gowin: Add rPLL blackbox
2020-11-11 17:06:54 +01:00
greenpak4
opt_expr: Remove -clkinv option, make it the default.
2020-07-31 00:08:15 +02:00
ice40
Replace opt_rmdff with opt_dff.
2020-08-07 13:21:03 +02:00
intel
synth_intel: Remove incomplete Arria 10 GX support.
2020-08-21 01:46:06 +02:00
intel_alm
intel_alm: better map wide but shallow multiplies
2020-08-28 23:44:16 +02:00
nexus
nexus: Add make_transp to BRAMs
2020-10-22 15:11:59 +01:00
sf2
sf2: Emit CLKINT even if -clkbuf not passed
2020-07-17 15:01:47 +02:00
xilinx
Move signal declarations to before first use
2020-10-19 16:09:18 -06:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00
Powered by Gitea Version: 1.27.2 Page: 579ms Template: 9ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API