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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
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c734b2bfe56cea283c806b2b8d64d9db74f7d832
yosys/passes
T
History
Miodrag Milanović bc8a3a5b18 Merge pull request #4219 from rovinski/master
dfflibmap: Add a -dont_use flag to ignore cells
2024-02-20 12:43:44 +01:00
..
cmds
Merge pull request #4216 from YosysHQ/show_href
2024-02-19 20:50:53 +01:00
equiv
equiv_simple: Fix seed handling in non-short mode
2023-10-03 13:05:42 +02:00
fsm
add option to fsm_detect to ignore self-resetting
2023-01-30 16:12:53 +01:00
hierarchy
hierarchy: Without a known top module, derive all deferred modules
2024-02-06 10:31:40 +01:00
memory
Fix printf formats
2024-01-15 12:07:54 +01:00
opt
Merge pull request #4084 from jix/scopeinfo
2024-02-12 09:51:22 +01:00
pmgen
Address SigBit/SigSpec confusion issues under c++20
2024-02-08 17:48:36 +01:00
proc
Merge pull request #4218 from kivikakk/proc_rom-actionless-switch
2024-02-19 16:21:40 +01:00
sat
clk2fflogic: Fix handling of $check cells
2024-02-14 11:42:27 +01:00
techmap
dfflibmap: force PathMatchSpecA on WIN32
2024-02-19 14:40:46 -05:00
tests
Add $bmux and $demux cells.
2022-01-28 23:34:41 +01:00
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