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luke
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yosys
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https://github.com/YosysHQ/yosys.git
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c3262d60752bb20ff5cd54bc4ee6f56e2b772b05
yosys
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tests
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arch
T
History
Eddie Hung
d0ee4cd88f
Remove extraneous synth_xilinx call
2019-12-12 19:00:26 -08:00
..
anlogic
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
common
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
ecp5
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
efinix
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
gowin
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
ice40
Rename memory tests to lutram, add more xilinx tests
2019-12-12 17:44:37 -08:00
xilinx
Remove extraneous synth_xilinx call
2019-12-12 19:00:26 -08:00
run-test.sh
Add simcells.v, simlib.v, and some output
2019-06-27 11:13:49 -07:00
