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22 lines
462 B
Plaintext
22 lines
462 B
Plaintext
read_verilog -icells <<EOT
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module top(input C, D, output Q);
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$_DFF_N_ ff0 (.C(C), .D(D), .Q(Q));
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endmodule
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EOT
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setattr -set src "top.sv:5" t:$_DFF_N_
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setattr -set hdlname "top.ff0" t:$_DFF_N_
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setattr -set my_attr "custom_one" t:$_DFF_N_
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read_liberty -lib dfflibmap.lib
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dfflibmap -liberty dfflibmap.lib
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select -assert-count 1 t:dffn
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select -assert-count 1 a:hdlname=top.ff0
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select -assert-count 1 a:src=top.sv:5
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select -assert-count 1 a:my_attr=custom_one
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