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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
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c25f3ff3df8ec0c6979af6fa938716e461c8261b
yosys/techlibs
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History
Tristan Gingold c25f3ff3df sf2: suport $alu gate and ARI1 implementation
2022-08-31 08:40:44 +02:00
..
achronix
…
anlogic
…
common
Add the $anyinit cell and the formalff pass
2022-08-16 13:37:30 +02:00
coolrunner2
…
easic
…
ecp5
Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.
2022-06-02 23:16:12 +02:00
efinix
…
gatemate
Fix static initialization, fixes mingw build
2022-07-04 19:31:38 +02:00
gowin
Apicula now supports lutram
2022-07-03 12:45:03 +02:00
greenpak4
…
ice40
Fitting help messages to 80 character width
2022-08-24 10:40:57 +12:00
intel
Fitting help messages to 80 character width
2022-08-24 10:40:57 +12:00
intel_alm
Fitting help messages to 80 character width
2022-08-24 10:40:57 +12:00
machxo2
…
nexus
nexus: Fix BRAM mapping.
2022-08-09 23:47:55 +02:00
quicklogic
Fitting help messages to 80 character width
2022-08-24 10:40:57 +12:00
sf2
sf2: suport $alu gate and ARI1 implementation
2022-08-31 08:40:44 +02:00
xilinx
Fitting help messages to 80 character width
2022-08-24 10:40:57 +12:00
.gitignore
…
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