mirror of https://github.com/YosysHQ/yosys.git
Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days. |
||
|---|---|---|
| .. | ||
| example_mojo_counter | ||
| example_sim_counter | ||
| example_zed_counter | ||
| Makefile.inc | ||
| cells.v | ||
| synth_xilinx.cc | ||