Clifford Wolf dbfd8460a9 Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

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asicworld

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

bram

Added support for (single-clock) transparent memories to bram tests

2016-11-01 10:03:13 +01:00

fsm

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

hana

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

memories

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

realmath

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

sat

Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

share

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

simple

Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

smv

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sva

Add simple VHDL+PSL example

2017-07-28 17:39:43 +02:00

techmap

Added read-enable to memory model

2015-09-25 12:23:11 +02:00

tools

Merge branch 'master' of https://github.com/brouhaha/yosys

2016-09-23 13:42:08 +02:00

unit

Build hotfix in tests/unit/Makefile

2016-12-11 10:58:49 +01:00

various

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vloghtb

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