mirror of https://github.com/YosysHQ/yosys.git
331ac5285f
Right now neither `sat` nor `sim` have support for the `$check` cell. For formal verification it is a good idea to always run either async2sync or clk2fflogic which will (in a future commit) lower `$check` to `$assert`, etc. While `sim` should eventually support `$check` directly, using `async2sync` is ok for the current tests that use `sim`, so this commit also runs `async2sync` before running sim on designs containing assertions. |
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| .. | ||
| .gitignore | ||
| enum_simple.sv | ||
| enum_simple.ys | ||
| logic_rom.sv | ||
| logic_rom.ys | ||
| multirange_array.sv | ||
| multirange_subarray_access.ys | ||
| run-test.sh | ||
| static_cast_negative.ys | ||
| static_cast_nonconst.ys | ||
| static_cast_simple.sv | ||
| static_cast_verilog.ys | ||
| static_cast_zero.ys | ||
| struct_array.sv | ||
| struct_dynamic_range.sv | ||
| struct_dynamic_range.ys | ||
| struct_simple.sv | ||
| struct_sizebits.sv | ||
| typedef_initial_and_assign.sv | ||
| typedef_initial_and_assign.ys | ||
| typedef_memory.sv | ||
| typedef_memory.ys | ||
| typedef_memory_2.sv | ||
| typedef_memory_2.ys | ||
| typedef_package.sv | ||
| typedef_param.sv | ||
| typedef_scopes.sv | ||
| typedef_simple.sv | ||
| typedef_struct.sv | ||
| typedef_struct_port.sv | ||
| typedef_struct_port.ys | ||
| union_simple.sv | ||