This website requires JavaScript.
Explore
Help
Sign In
luke
/
yosys
Watch
1
Star
0
Fork
0
mirror of
https://github.com/YosysHQ/yosys.git
synced
2026-09-06 11:59:46 +02:00
Code
Issues
Packages
Projects
Releases
Wiki
Activity
Files
b818e1c8ca8d708fd56524d682945babbb2abb88
yosys
/
techlibs
/
efinix
T
History
nella
f5809a7c2c
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
..
arith_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
brams_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
brams.txt
efinix: Use
memory_libmap
pass.
2022-05-18 17:32:56 +02:00
cells_map.v
techmap: Add support for [] wildcards in techmap_celltype.
2020-08-02 22:46:48 +02:00
cells_sim.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
CMakeLists.txt
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
efinix_fixcarry.cc
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
gbuf_map.v
…
synth_efinix.cc
Simplify check -latchonly calls in synth.
2026-07-07 10:10:00 +02:00