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b7a3d35c6b02f44dcad4052e2efe05c32fdada6b
yosys
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techlibs
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ecp5
T
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David Shah
777864d02e
ecp5: Demote conflicting FF init values to a warning
...
Signed-off-by: David Shah <
[email protected]
>
2019-03-04 11:26:20 +00:00
..
.gitignore
…
arith_map.v
ecp5: Increase threshold for ALU mapping
2019-01-21 12:33:47 +00:00
bram.txt
…
brams_connect.py
…
brams_init.py
…
brams_map.v
…
cells_bb.v
ecp5: Add DDRDLLA
2019-02-19 19:34:37 +00:00
cells_map.v
ecp5: Compatibility with Migen AsyncResetSynchronizer
2019-02-25 13:24:30 +00:00
cells_sim.v
Fix ECP5 cells_sim for iverilog
2019-03-01 19:25:23 +01:00
dram.txt
…
drams_map.v
…
ecp5_ffinit.cc
ecp5: Demote conflicting FF init values to a warning
2019-03-04 11:26:20 +00:00
latches_map.v
…
Makefile.inc
ecp5: Support for flipflop initialisation
2019-01-22 16:02:56 +00:00
synth_ecp5.cc
Merge pull request
#794
from daveshah1/ecp5improve
2019-02-28 14:46:56 -08:00
