mirror of https://github.com/YosysHQ/yosys.git
39 lines
971 B
Plaintext
39 lines
971 B
Plaintext
read_verilog opt_andor_pmux.v
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hierarchy -top mixed_vector_decode
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proc
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design -save mixed_gold
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opt_andor_pmux
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select -assert-count 2 t:$pmux
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design -stash mixed_gate
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design -copy-from mixed_gold -as gold mixed_vector_decode
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design -copy-from mixed_gate -as gate mixed_vector_decode
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miter -equiv -flatten -make_assert -make_outputs gold gate miter
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sat -verify -prove-asserts -show-inputs -show-outputs miter
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design -reset
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read_verilog opt_andor_pmux.v
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hierarchy -top partial_vector_decode
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proc
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design -save partial_gold
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opt_andor_pmux
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select -assert-count 2 t:$pmux
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design -stash partial_gate
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design -copy-from partial_gold -as gold partial_vector_decode
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design -copy-from partial_gate -as gate partial_vector_decode
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miter -equiv -flatten -make_assert -make_outputs gold gate miter
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sat -verify -prove-asserts -show-inputs -show-outputs miter
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design -reset
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read_verilog opt_andor_pmux.v
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hierarchy -top tiny_decode
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proc
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opt_andor_pmux
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select -assert-count 0 t:$pmux
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