yosys/backends at b45d06d7a334c4b18e44793b33aaffcaf1f04b21 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-04 11:29:42 +02:00

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Eddie Hung fb90d8c18c Cleanup

2019-06-16 09:34:26 -07:00

..

Cleanup

2019-06-16 09:34:26 -07:00

Fix handling of offset and upto module ports in write_blif, fixes #1040

2019-05-25 17:45:14 +02:00

Add proper error message for btor recursion_guard

2019-05-24 16:22:34 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Fix static shift operands, neg result type, minor formatting

2019-05-21 13:04:56 -07:00

Add "real" keyword to ilang format

2019-05-06 12:00:40 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Update from master

2019-05-28 09:35:45 -07:00

Reduce amount of trailing whitespace in code base

2019-02-28 14:58:11 -08:00

Fix typographical and grammatical errors and inconsistencies.

2019-01-02 13:12:17 +00:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Fix handling of partial init attributes in write_verilog, fixes #997

2019-05-07 19:55:36 +02:00