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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-07 12:21:16 +02:00
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b17e8495b83bc8fa13a5ac982b44c0b68d71a68a
yosys/frontends
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Eddie Hung 1ebf7155a7 aiger: cleanup
2020-05-25 08:43:33 -07:00
..
aiger
aiger: cleanup
2020-05-25 08:43:33 -07:00
ast
Add force_downto and force_upto wire attributes.
2020-05-19 01:42:40 +02:00
blif
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
ilang
frontend: cleanup to use more ID::*, more dict<> instead of map<>
2020-05-04 10:48:37 -07:00
json
Update JSON front-end to process new attr/param encoding
2019-08-01 12:48:22 +02:00
liberty
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
rpc
Add WASI platform support.
2020-04-30 18:56:25 +00:00
verific
Revert "Add support for non-power-of-two mem chunks in verific importer"
2020-05-17 11:31:11 +02:00
verilog
Merge pull request #2057 from YosysHQ/eddie/fix_task_attr
2020-05-21 11:00:36 -07:00
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