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Makefile.inc
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analogdevices: remove cells_xtra
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2025-11-12 22:44:12 +00:00 |
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abc9_model.v
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Create synth_analogdevices
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2025-11-12 22:44:11 +00:00 |
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arith_map.v
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analogdevices: update timing model
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2025-11-12 22:44:12 +00:00 |
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brams.txt
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analogdevices: Adding RBRAM2 and -tech
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2025-11-12 22:44:12 +00:00 |
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brams_defs.vh
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Create synth_analogdevices
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2025-11-12 22:44:11 +00:00 |
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brams_map.v
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analogdevices: Adding RBRAM2 and -tech
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2025-11-12 22:44:12 +00:00 |
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cells_map.v
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Create synth_analogdevices
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2025-11-12 22:44:11 +00:00 |
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cells_sim.v
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analogdevices: DSP tweaks
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2025-11-12 22:44:12 +00:00 |
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dsp_map.v
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analogdevices: DSP inference
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2025-11-12 22:44:12 +00:00 |
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ff_map.v
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test suite
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2025-11-12 22:44:11 +00:00 |
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lut_map.v
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analogdevices: use single tech param
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2025-11-12 22:44:12 +00:00 |
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lutrams.txt
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analogdevices: LUT RAM only on positive edge
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2025-11-12 22:44:12 +00:00 |
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lutrams_map.v
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analogdevices: Native LUTRAM primitives
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2025-11-12 22:44:12 +00:00 |
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mux_map.v
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Create synth_analogdevices
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2025-11-12 22:44:11 +00:00 |
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retarget_map.v
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analogdevices: user retargeting
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2025-11-12 22:44:12 +00:00 |
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synth_analogdevices.cc
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analogdevices: DSP tweaks
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2025-11-12 22:44:12 +00:00 |
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