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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
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aabe1c382e635040d16b6a29c7e2741e8e9d7adf
yosys/backends
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History
Marcelina Kościelnicka aabe1c382e backends/verilog: Add wide port support.
2021-05-27 16:15:46 +02:00
..
aiger
abc9: fix SCC issues (#2694)
2021-03-29 22:01:57 -07:00
blif
backends/blif: Remove unused vector of strings (#2420)
2020-11-16 09:31:48 +01:00
btor
Reject wide ports in some passes that will never support them.
2021-05-25 02:07:25 +02:00
cxxrtl
cxxrtl: don't assert on edge sync rules tied to a constant.
2021-03-07 14:29:30 +00:00
edif
use the new isPublic() in a few places
2020-09-14 12:43:18 +02:00
firrtl
Reject wide ports in some passes that will never support them.
2021-05-25 02:07:25 +02:00
intersynth
Replace "ILANG" with "RTLIL" everywhere.
2020-08-26 17:29:32 +00:00
json
json: Improve the "processes in module" message a bit.
2021-03-23 15:53:49 +01:00
protobuf
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
rtlil
rtlil: Fix process memwr roundtrip.
2021-03-23 19:49:47 +01:00
simplec
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
smt2
Reject wide ports in some passes that will never support them.
2021-05-25 02:07:25 +02:00
smv
btor, smt2, smv: Add a hint on how to deal with funny FF types.
2021-02-25 22:04:04 +01:00
spice
add buffer option to spice backend
2021-01-13 17:24:28 +01:00
table
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
verilog
backends/verilog: Add wide port support.
2021-05-27 16:15:46 +02:00
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