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luke
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yosys
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aa1eeda567d09e2d2ffd40cd008d0166d2910273
yosys
/
frontends
T
History
Eddie Hung
6c2cb51996
Merge remote-tracking branch 'origin/xaig' into xc7mux
2019-06-21 17:44:21 -07:00
..
aiger
Merge remote-tracking branch 'origin/xaig' into xc7mux
2019-06-21 17:34:19 -07:00
ast
Add "read_verilog -pwires" feature,
closes
#1106
2019-06-19 14:38:50 +02:00
blif
Add missing "[options]" to read_blif help
2019-02-08 12:41:39 -08:00
ilang
Make the generated *.tab.hh include all the headers needed to define the union.
2019-05-14 21:07:26 -07:00
json
Fix typo
2019-06-21 19:09:34 +02:00
liberty
Fix typographical and grammatical errors and inconsistencies.
2019-01-02 13:12:17 +00:00
verific
Only support Symbiotic EDA flavored Verific
2019-06-02 10:14:50 +02:00
verilog
Merge pull request
#1119
from YosysHQ/eddie/fix1118
2019-06-21 10:13:13 +02:00
