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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 19:19:48 +02:00
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aa0c37722a99a308e64ea9581111adea2d97e46d
yosys/frontends
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History
Eddie Hung 9776084eda Allow whitebox modules to be overwritten
2019-08-07 16:40:24 -07:00
..
aiger
Run "clean" on mapped_mod in its own design
2019-08-07 09:54:27 -07:00
ast
Allow whitebox modules to be overwritten
2019-08-07 16:40:24 -07:00
blif
Add missing "[options]" to read_blif help
2019-02-08 12:41:39 -08:00
ilang
Allow attributes on individual switch cases in RTLIL.
2019-07-08 11:34:58 +00:00
json
Update JSON front-end to process new attr/param encoding
2019-08-01 12:48:22 +02:00
liberty
Fix typo, double "of"
2019-07-16 11:03:30 +02:00
verific
Call "read_verilog" with -defer from "read"
2019-07-29 10:29:36 +02:00
verilog
verilog_lexer: Increase YY_BUF_SIZE to 65536
2019-07-26 13:35:39 +01:00
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