Miodrag Milanović c7af1b22ba Merge pull request #1701 from nakengelhardt/rpc-test ... make rpc frontend unix socket test less fragile		2020-02-14 12:06:37 +01:00
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aiger	Add testcases	2020-01-07 11:44:20 -08:00
arch	xilinx: Add support for LUT RAM on LUT4-based devices.	2020-02-07 09:03:22 +01:00
asicworld	…
bram	…
errors	…
fsm	Speed up "make test" and related cleanups	2019-08-17 14:37:07 +02:00
hana	…
liberty	…
lut	Forgot to commit	2019-07-16 12:44:26 -07:00
memfile	Added 'set -e' into tests/memfile/run-test.sh	2020-02-06 10:45:40 -03:00
memories	…
opt	Merge pull request #1576 from YosysHQ/eddie/opt_merge_init	2020-02-05 14:56:26 -08:00
opt_share	Support various binary operators in opt_share	2019-08-04 19:06:38 +02:00
proc	proc_clean: fix order of switch insertion.	2019-08-19 16:44:23 +00:00
realmath	…
rpc	make rpc frontend unix socket test less fragile	2020-02-13 20:52:22 +01:00
sat	Merge pull request #1638 from YosysHQ/eddie/fix1631	2020-02-05 19:31:18 +01:00
share	…
simple	Make SV2017 compliant courtesy of @wsnyder	2019-12-12 07:34:07 -08:00
simple_abc9	simple_abc9 tests to discard whitebox before write for sim	2020-01-23 22:07:43 -08:00
smv	…
sva	…
svinterfaces	…
svtypes	Use "(id)" instead of "id" for types as temporary hack	2019-10-14 05:24:31 +02:00
techmap	Fine tune #1699 tests	2020-02-13 15:14:58 -08:00
tools	…
unit	…
various	Merge pull request #1679 from thasti/delay-parsing	2020-02-13 12:01:27 +01:00
vloghtb	…