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luke
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yosys
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a75f94ec4ae411d98d9882e423e0ae02eda4bd37
yosys
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techlibs
T
History
Clifford Wolf
a75f94ec4a
Run dffsr2dff in synth_xilinx
2016-02-13 08:20:19 +01:00
..
common
Progress in cell library documentation
2016-02-01 13:58:10 +01:00
greenpak4
Added nlutmap
2015-09-18 21:57:34 +02:00
ice40
Work around DDR dout sim glitches in ice40 SB_IO sim model
2016-02-07 11:19:48 +01:00
xilinx
Run dffsr2dff in synth_xilinx
2016-02-13 08:20:19 +01:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00