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yosys/techlibs
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R. Ou a618004897 coolrunner2: Fix packed register+input buffer insertion 
The register will be packed with the input buffer if and only if the
input buffer doesn't have any other loads.
2020-03-02 00:32:57 -08:00
..
achronix
Remove executable flag from files
2020-02-15 10:36:44 +01:00
anlogic
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
common
techmap: fix shiftx2mux decomposition
2020-02-07 11:02:48 -08:00
coolrunner2
coolrunner2: Fix packed register+input buffer insertion
2020-03-02 00:32:57 -08:00
easic
Update doc that "-retime" calls abc with "-dff -D 1"
2019-12-30 13:28:29 -08:00
ecp5
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
efinix
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
gowin
Removing cells_sim.v from bram techmap pass
2020-02-06 14:38:29 -06:00
greenpak4
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
ice40
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
intel
Add log_experimental() and experimental() API and "yosys -x"
2020-01-27 18:27:47 +01:00
sf2
synth_*: call 'opt -fast' after 'techmap'
2020-02-05 18:39:01 -08:00
xilinx
xilinx: mark IOBUFDSE3 IOB pin as external
2020-02-27 13:15:57 +01:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00