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yosys/techlibs/analogdevices
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Krystine Sherwin a590811d50 analogdevices: (some) Native BRAM 
Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
 		2026-01-08 00:12:34 +00:00
..
Makefile.inc Create synth_analogdevices 2026-01-08 00:12:34 +00:00
abc9_model.v Create synth_analogdevices 2026-01-08 00:12:34 +00:00
arith_map.v analogdevices: update timing model 2026-01-08 00:12:34 +00:00
brams.txt analogdevices: (some) Native BRAM 2026-01-08 00:12:34 +00:00
brams_defs.vh Create synth_analogdevices 2026-01-08 00:12:34 +00:00
brams_map.v analogdevices: (some) Native BRAM 2026-01-08 00:12:34 +00:00
cells_map.v Create synth_analogdevices 2026-01-08 00:12:34 +00:00
cells_sim.v analogdevices: (some) Native BRAM 2026-01-08 00:12:34 +00:00
cells_xtra.py Create synth_analogdevices 2026-01-08 00:12:34 +00:00
cells_xtra.v analogdevices: remove some extra cells! 2026-01-08 00:12:34 +00:00
dsp_map.v Create synth_analogdevices 2026-01-08 00:12:34 +00:00
ff_map.v test suite 2026-01-08 00:12:34 +00:00
lut_map.v analogdevices: update timing model 2026-01-08 00:12:34 +00:00
lutrams.txt analogdevices: Native LUTRAM primitives 2026-01-08 00:12:34 +00:00
lutrams_map.v analogdevices: Native LUTRAM primitives 2026-01-08 00:12:34 +00:00
mux_map.v Create synth_analogdevices 2026-01-08 00:12:34 +00:00
retarget_map.v analogdevices: user retargeting 2026-01-08 00:12:34 +00:00
synth_analogdevices.cc analogdevices: (some) Native BRAM 2026-01-08 00:12:34 +00:00