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24 lines
802 B
Plaintext
24 lines
802 B
Plaintext
# halfadder/latch/tri_inv/dff instances from normal.lib survive, gates around them get mapped
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read_liberty -lib -unit_delay ../liberty/normal.lib
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read_liberty -lib -unit_delay ../liberty/dff.lib
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read_verilog <<EOT
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module top(input clk, g, en, input [1:0] a, b, output [1:0] s, output c, output z, output q);
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wire [1:0] t = a ^ b;
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halfadder ha0(.A(t[0]), .B(b[1]), .CO(c), .Y(s[0]));
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latch l0(.D(t[1]), .G(g), .Q(s[1]), .QN());
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tri_inv ti(.A(a[0] & b[0]), .S(en), .Z(z));
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dff d0(.D(t[0] | t[1]), .CLK(clk), .Q(q));
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endmodule
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EOT
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hierarchy -top top
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proc
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techmap
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abc_new -liberty ../liberty/normal.lib -liberty ../liberty/dff.lib
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select -assert-count 1 t:halfadder
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select -assert-count 1 t:latch
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select -assert-count 1 t:tri_inv
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select -assert-count 1 t:dff
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select -assert-none t:$_*_
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check -assert
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