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16 lines
317 B
Plaintext
16 lines
317 B
Plaintext
# https://github.com/YosysHQ/yosys/issues/5220
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# 1'z constants into write_xaiger2
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read_verilog <<EOT
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module top(input a, output [1:0] y, output z);
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assign y = 2'bzz;
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assign z = a & 1'bz;
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endmodule
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EOT
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hierarchy -top top
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techmap
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abc_new -liberty openroad/cm_test_cells.lib
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select -assert-none t:$_*_
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check -assert
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