Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-07 12:21:16 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
a0d3d2bb41cd11b5b33620e16cb67c6568b16847
yosys/backends
T
History
Eddie Hung c4ea6fff65 Fix gcc invalidation behaviour for write_aiger
2019-06-20 21:56:47 -07:00
..
aiger
Fix gcc invalidation behaviour for write_aiger
2019-06-20 21:56:47 -07:00
blif
Fix handling of offset and upto module ports in write_blif, fixes #1040
2019-05-25 17:45:14 +02:00
btor
Add proper error message for btor recursion_guard
2019-05-24 16:22:34 +02:00
edif
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
firrtl
Fix static shift operands, neg result type, minor formatting
2019-05-21 13:04:56 -07:00
ilang
Support filename rewrite in backends
2019-06-18 14:39:52 -07:00
intersynth
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
json
Support filename rewrite in backends
2019-06-18 14:39:52 -07:00
protobuf
Support filename rewrite in backends
2019-06-18 14:39:52 -07:00
simplec
Fix typographical and grammatical errors and inconsistencies.
2019-01-02 13:12:17 +00:00
smt2
Add timescale and generated-by header to yosys-smtbmc MkVcd
2019-06-16 23:12:03 +02:00
smv
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
spice
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
table
Add "whitebox" attribute, add "read_verilog -wb"
2019-04-18 17:45:47 +02:00
verilog
Fix handling of partial init attributes in write_verilog, fixes #997
2019-05-07 19:55:36 +02:00
Powered by Gitea Version: 1.27.2 Page: 528ms Template: 4ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API