yosys/passes/techmap
Eddie Hung d9daf09cf3
Merge pull request #914 from YosysHQ/xc7srl
synth_xilinx to now infer SRL16E/SRLC32E
2019-04-22 13:31:30 -07:00
..
.gitignore
Makefile.inc Use new pmux2shiftx from #944, remove my old attempt 2019-04-21 14:16:34 -07:00
abc.cc Fix abc's remap_name to not ignore [^0-9] when extracting sid 2019-04-18 09:55:03 -07:00
aigmap.cc
alumacc.cc
attrmap.cc attrmap: extend -remove to allow removing attributes with any value. 2019-04-22 14:18:15 +00:00
attrmvcp.cc
deminout.cc
dff2dffe.cc
dff2dffs.cc
dffinit.cc
dfflibmap.cc Add "whitebox" attribute, add "read_verilog -wb" 2019-04-18 17:45:47 +02:00
dffsr2dff.cc
extract.cc
extract_counter.cc
extract_fa.cc
extract_reduce.cc
filterlib.cc
flowmap.cc Clean up some whitepsace outliers 2019-02-26 09:39:46 -08:00
hilomap.cc
insbuf.cc
iopadmap.cc
libparse.cc Liberty file parser now accepts superfluous ; 2019-03-27 15:17:58 +01:00
libparse.h Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. 2019-03-24 22:54:18 +01:00
lut2mux.cc
maccmap.cc
muxcover.cc
nlutmap.cc
pmuxtree.cc Spelling fixes 2019-04-19 14:00:22 +02:00
shregmap.cc Use new pmux2shiftx from #944, remove my old attempt 2019-04-21 14:16:34 -07:00
simplemap.cc Check blackbox attribute in techmap/simplemap 2019-04-20 11:10:05 +02:00
simplemap.h
techmap.cc Add log_debug() framework 2019-04-22 17:25:52 +02:00
tribuf.cc
zinit.cc