Eddie Hung 9a6da9a79a synth_* with -retime option now calls abc with -D 1 as well

2019-04-10 08:32:53 -07:00

..

tests

Improved xilinx "bram1" test

2015-04-09 17:12:12 +02:00

.gitignore

…

arith_map.v

Changes required for VPR place and route synth_xilinx.

2019-03-01 12:02:27 -08:00

brams_bb.v

…

brams_init.py

Squelch trailing whitespace, including meta-whitespace

2018-03-11 16:03:41 +01:00

brams_map.v

Revert BRAM WRITE_MODE changes.

2019-03-04 09:22:22 -08:00

brams.txt

Added read-enable to memory model

2015-09-25 12:23:11 +02:00

cells_map.v

Changes required for VPR place and route synth_xilinx.

2019-03-01 12:02:27 -08:00

cells_sim.v

Revert FF models to include IS_x_INVERTED parameters.

2019-03-01 14:41:21 -08:00

cells_xtra.sh

xilinx: Add keep attribute where appropriate

2019-03-22 13:57:17 +00:00

cells_xtra.v

xilinx: Add keep attribute where appropriate

2019-03-22 13:57:17 +00:00

drams_map.v

…

drams.txt

…

ff_map.v

Retry

2019-04-05 15:31:54 -07:00

lut_map.v

Changes required for VPR place and route synth_xilinx.

2019-03-01 12:02:27 -08:00

Makefile.inc

Changes required for VPR place and route synth_xilinx.

2019-03-01 12:02:27 -08:00

synth_xilinx.cc

synth_* with -retime option now calls abc with -D 1 as well

2019-04-10 08:32:53 -07:00