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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-31 18:24:48 +02:00
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9892df17efadd0eafe5217e812fb4cec2bfdf6e5
yosys/techlibs
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Eddie Hung 99a3fee8f4 Add "min bits" and "min wports" to xilinx dram rules
2019-05-23 11:32:28 -07:00
..
achronix
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
anlogic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
common
Add "wreduce -keepdc", fixes #1016
2019-05-20 15:36:13 +02:00
coolrunner2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
easic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ecp5
Add handling of init attributes in "opt_expr -undriven"
2019-04-30 14:46:12 +02:00
gowin
Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master
2019-04-22 09:09:27 +02:00
greenpak4
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ice40
ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC
2019-05-13 12:51:06 +02:00
intel
Fix formatting for synth_intel.cc
2019-05-09 08:40:05 -07:00
sf2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
xilinx
Add "min bits" and "min wports" to xilinx dram rules
2019-05-23 11:32:28 -07:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00
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