Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-31 18:24:48 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
933db0410e096286c21772f5a2f44b03d2ed0b57
yosys/techlibs/intel
T
History
David Shah 9cb0456b6f Merge pull request #1208 from ZirconiumX/intel_cleanups
Assorted synth_intel cleanups from @bwidawsk
2019-07-18 19:04:28 +01:00
..
a10gx
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00
common
Changes in GoWin synth commands and ALU primitive support
2018-12-03 20:08:35 -06:00
cyclone10
Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device
2018-03-31 22:48:47 -06:00
cycloneiv
Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device
2018-03-31 22:48:47 -06:00
cycloneive
Reduce amount of trailing whitespace in code base
2019-02-28 14:58:11 -08:00
cyclonev
Fixing issues in CycloneV cell sim
2019-04-11 19:59:03 -05:00
max10
Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device
2018-03-31 22:48:47 -06:00
Makefile.inc
Initial Cyclone 10 support
2017-11-08 22:45:21 -06:00
synth_intel.cc
Merge pull request #1208 from ZirconiumX/intel_cleanups
2019-07-18 19:04:28 +01:00
Powered by Gitea Version: 1.27.2 Page: 1356ms Template: 3ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API