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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
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927f0caa9d70ccf3634b29d8558c78febcc9081c
yosys/techlibs
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David Shah 82153059a1 Merge pull request #1204 from smunaut/fix_1187
ice40: Adapt the relut process passes to the new $lut/SB_LUT4 port map
2019-07-17 07:55:26 +01:00
..
achronix
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
anlogic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
common
gen_lut to return correctly sized LUT mask
2019-07-16 12:45:29 -07:00
coolrunner2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
easic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ecp5
Error out if -abc9 and -retime specified
2019-07-10 12:47:48 -07:00
gowin
Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master
2019-04-22 09:09:27 +02:00
greenpak4
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ice40
ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
2019-07-16 23:57:15 +02:00
intel
synth_intel: Warn about untested Quartus backend
2019-07-07 19:26:31 +01:00
sf2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
xilinx
Merge pull request #1182 from koriakin/xc6s-bram
2019-07-11 12:55:35 -07:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00
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