Eddie Hung 7876b5b8be Cover __APPLE__ too for little to big endian

2019-06-14 12:40:51 -07:00

..

aiger

Cover __APPLE__ too for little to big endian

2019-06-14 12:40:51 -07:00

blif

Fix handling of offset and upto module ports in write_blif, fixes #1040

2019-05-25 17:45:14 +02:00

btor

Add proper error message for btor recursion_guard

2019-05-24 16:22:34 +02:00

edif

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

firrtl

Fix static shift operands, neg result type, minor formatting

2019-05-21 13:04:56 -07:00

ilang

Add "real" keyword to ilang format

2019-05-06 12:00:40 +02:00

intersynth

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

json

Update from master

2019-05-28 09:35:45 -07:00

protobuf

Reduce amount of trailing whitespace in code base

2019-02-28 14:58:11 -08:00

simplec

Fix typographical and grammatical errors and inconsistencies.

2019-01-02 13:12:17 +00:00

smt2

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

smv

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

spice

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

table

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

verilog

Fix handling of partial init attributes in write_verilog, fixes #997

2019-05-07 19:55:36 +02:00