yosys/tests
N. Engelhardt 9f869b265c
Merge pull request #4474 from tony-min-1/mchp
Add PolarFire FPGA support
2024-07-29 15:28:44 +02:00
..
aiger read_aiger: Fix incorrect read of binary Aiger without outputs 2024-04-29 14:06:58 +01:00
arch inline all tests. Add switch to remove init values as PolarFire DFFs do not support init 2024-07-08 17:03:03 -04:00
asicworld
bind
blif
bram
cxxrtl cxxxrtl: fix use of format specifiers in test 2024-06-11 07:22:39 +01:00
errors
fmt
fsm
hana
liberty
lut
memfile
memlib Move parameters to module declaration 2024-04-08 12:44:37 +02:00
memories Move parameters to module declaration 2024-04-08 12:44:37 +02:00
opt tests: Remove part of test involving combinational loops 2024-03-11 10:45:36 +01:00
opt_share
proc proc_rom: test src attribute on memories 2024-07-29 10:13:45 +02:00
realmath
rpc
sat
select
share
sim
simple write_verilog: don't `assign` to a `reg`. 2024-04-03 13:06:45 +02:00
simple_abc9
smv
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces
svtypes
techmap cellmatch: Rename the special design to `$cellmatch` 2024-05-03 16:42:41 +02:00
tools
unit
various box_derive: Tune the test 2024-05-29 20:42:11 +02:00
verific
verilog write_verilog: don't `assign` to a `reg`. 2024-04-03 13:06:45 +02:00
vloghtb
xprop
gen-tests-makefile.sh