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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 01:53:53 +02:00
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7fe770a441a129c509fd4da04b60ada942a28bc8
yosys/backends
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whitequark 7fe770a441 write_verilog: correctly map RTLIL sync init.
2018-12-07 18:55:08 +00:00
..
aiger
Add "write_aiger -I -O -B"
2018-11-12 09:27:33 +01:00
blif
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
btor
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
edif
Add "write_edif -attrprop"
2018-10-05 09:41:30 +02:00
firrtl
added prefix to FDirection constants, fixing windows build
2018-09-21 20:43:49 +02:00
ilang
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
intersynth
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
json
Merge pull request #591 from hzeller/virtual-override
2018-08-15 14:05:38 +02:00
protobuf
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
simplec
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
smt2
Merge pull request #693 from YosysHQ/rlimit
2018-11-07 20:16:40 +01:00
smv
Minor update
2018-10-15 13:54:12 -04:00
spice
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
table
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
verilog
write_verilog: correctly map RTLIL sync init.
2018-12-07 18:55:08 +00:00
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