yosys/tests at 7f734ecc098a2a113ced835cefc9d4e1982f08d0 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-30 01:48:17 +02:00

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Clifford Wolf 28cf48e31f Some improvements in FSM mapping and recoding

2014-08-14 11:22:45 +02:00

..

Added "make -j{N}" support to "make test"

2014-07-30 19:23:26 +02:00

Some improvements in FSM mapping and recoding

2014-08-14 11:22:45 +02:00

Consolidated hana test benches into fewer files

2014-08-01 03:57:37 +02:00

Added SAT-based write-port sharing to memory_share

2014-07-19 15:33:55 +02:00

Added note to "make test": use git checkout of iverilog

2014-07-16 10:03:07 +02:00

Added yet another resource sharing test case

2014-07-20 21:15:01 +02:00

Added "wreduce" to some of the standard test benches

2014-08-03 20:22:33 +02:00

Added multi-dim memory test (requires iverilog git head)

2014-08-12 10:37:47 +02:00

Changed tests/techmap/mem_simple_4x1_map for new $mem/$memwr WR_EN interface

2014-07-16 14:08:51 +02:00

Added "wreduce" to some of the standard test benches

2014-08-03 20:22:33 +02:00

Added tests/various/.gitignore

2014-07-26 17:43:41 +02:00

Added "wreduce" to some of the standard test benches

2014-08-03 20:22:33 +02:00