Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-31 18:24:48 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
7e2fc2eaeb70179c8da3e5dc8be800f486d5b912
yosys/techlibs/efinix
T
History
Marcelina Kościelnicka 522788f016 techmap: Add support for [] wildcards in techmap_celltype.
Fixes #1826.
2020-08-02 22:46:48 +02:00
..
arith_map.v
Add force_downto and force_upto wire attributes.
2020-05-19 01:42:40 +02:00
brams_map.v
one bit enable signal
2019-08-11 13:59:39 +02:00
brams.txt
Harmonize BRAM/LUTRAM descriptions across all of Yosys.
2020-01-01 12:30:00 +00:00
cells_map.v
techmap: Add support for [] wildcards in techmap_celltype.
2020-08-02 22:46:48 +02:00
cells_sim.v
efinix: Nuke efinix_gbuf in favor of clkbufmap.
2020-07-04 20:53:43 +02:00
efinix_fixcarry.cc
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
gbuf_map.v
efinix: Nuke efinix_gbuf in favor of clkbufmap.
2020-07-04 20:53:43 +02:00
Makefile.inc
efinix: Nuke efinix_gbuf in favor of clkbufmap.
2020-07-04 20:53:43 +02:00
synth_efinix.cc
Merge pull request #2226 from YosysHQ/mwk/nuke-efinix-gbuf
2020-07-16 18:07:41 +02:00
Powered by Gitea Version: 1.27.2 Page: 2680ms Template: 3ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API