yosys/techlibs at 7d94e18100a6fe61805e94e754b199826571e7ef - yosys - Gitea: Git with a cup of tea

luke/yosys

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Eddie Hung 7d94e18100 synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macro

2020-01-10 15:07:46 -08:00

..

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

…

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Merge remote-tracking branch 'origin/master' into xaig_dff

2020-01-06 09:31:28 -08:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Merge remote-tracking branch 'origin/master' into xaig_dff

2020-01-06 09:31:28 -08:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macro

2020-01-10 15:07:46 -08:00

.gitignore

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