mirror of https://github.com/YosysHQ/yosys.git
d015c2b48a
This BRAM mode uses both address ports, making it effectively single-port. Since memory_bram can't presently map to single-port memories, remove it. |
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| .. | ||
| abc9_map.v | ||
| abc9_model.v | ||
| abc9_unmap.v | ||
| alm_map.v | ||
| alm_sim.v | ||
| arith_alm_map.v | ||
| bram_m10k.txt | ||
| bram_m20k.txt | ||
| bram_m20k_map.v | ||
| dff_map.v | ||
| dff_sim.v | ||
| dsp_map.v | ||
| dsp_sim.v | ||
| lutram_mlab.txt | ||
| megafunction_bb.v | ||
| mem_sim.v | ||
| misc_sim.v | ||
| quartus_rename.v | ||