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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-06 03:52:06 +02:00
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761dc6f62aebbe80bb6eb10bc028418bb036e302
yosys/tests/arch
T
History
Adrien Prost-Boucle 6bf7587338 URAM mapping : Add test for 2048 x 144b
2025-05-10 14:53:56 +02:00
..
anlogic
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
common
tests: fix blockrom.v driver conflict
2024-12-02 16:56:42 +01:00
ecp5
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
efinix
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
fabulous
fabulous: Add support for mapping carry chains
2023-02-27 09:50:34 +01:00
gatemate
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
gowin
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
ice40
ice40_dsp: add test
2025-04-09 21:21:46 +03:00
intel_alm
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
machxo2
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
microchip
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
nanoxplore
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
nexus
test: restore verific handling, nicer naming
2024-12-13 10:24:47 +01:00
quicklogic
create duplicate IOFFs if multiple output ports are connected to the same register
2025-01-31 11:28:57 +01:00
xilinx
URAM mapping : Add test for 2048 x 144b
2025-05-10 14:53:56 +02:00
run-test.sh
Enable SV for localparam use by Efinix cell_sim
2024-04-08 12:45:43 +02:00
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